/*
 * Jailhouse, a Linux-based partitioning hypervisor
 *
 * Configuration for demo inmate on Phytium FT2000/4
 *
 */

#include <jailhouse/types.h>
#include <jailhouse/cell-config.h>

struct {
	struct jailhouse_cell_desc cell;
	__u64 cpus[1];
	struct jailhouse_memory mem_regions[15];
	struct jailhouse_irqchip irqchips[1];
	struct jailhouse_pci_device pci_devices[0];
	struct jailhouse_pci_capability pci_caps[0];
} __attribute__((packed)) config = {
    .cell =
        {
            .signature = JAILHOUSE_CELL_DESC_SIGNATURE,
            .revision = JAILHOUSE_CONFIG_REVISION,
            .name = "linux",
            .flags = JAILHOUSE_CELL_PASSIVE_COMMREG,

            .cpu_set_size = sizeof(config.cpus),
            .num_memory_regions = ARRAY_SIZE(config.mem_regions),
            .num_irqchips = ARRAY_SIZE(config.irqchips),
            .num_pci_devices = ARRAY_SIZE(config.pci_devices),
            .num_pci_caps = ARRAY_SIZE(config.pci_caps),
            .vpci_irq_base = 101,
            .console =
                {
                    .address = 0x28000000,
                    .type = JAILHOUSE_CON_TYPE_PL011,
                    .flags =
                        JAILHOUSE_CON_ACCESS_MMIO | JAILHOUSE_CON_REGDIST_4,
                },
        },

    .cpus = {0b0001},

    .irqchips =
        {
            {
                .address = 0x29900000,
                .pin_base = 32,
                .pin_bitmap =
                    {
                        1 << (38 - 32),
                        0,
                        0,
                        0xffffffff,
                    },
            },
        },

    .mem_regions = {
        /* UART */ {
            .phys_start = 0x28000000,
            .virt_start = 0x28000000,
            .size = 0x1000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
        },
        /* RAM */
        {
            .phys_start = 0x92000000,
            .virt_start = 0,
            .size = 0x1000000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_LOADABLE,
        },

        /* RAM */
        {
            .phys_start = 0x93000000,
            .virt_start = 0x93000000,
            .size = 0x1d000000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_EXECUTE | JAILHOUSE_MEM_DMA |
                     JAILHOUSE_MEM_LOADABLE,
        },
        /* communication region */
        {
            .virt_start = 0x80000000,
            .size = 0x00001000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_COMM_REGION,
        },
        {
            .phys_start = 0x2a000000,
            .virt_start = 0x2a000000,
            .size = 0x1000,
            .flags =
                JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO,
        },
        /* MemRegion: 58300000-583fffff : 0000:06:00.0 */
        {
            .phys_start = 0x58300000,
            .virt_start = 0x1000000000,
            .size = 0x1000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE,
        },
        /* gic its */
        {
            .phys_start = 0x29920000,
            .virt_start = 0x29920000,
            .size = 0x20000,
            .flags =
                JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO,
        },
        /* PCIe ECAM */
        {
            .phys_start = 0x40000000,
            .virt_start = 0x40000000,
            .size = 0x10000000,
            .flags =
                JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO,
        },
        /* PCIe IO */
        {
            .phys_start = 0x50000000,
            .virt_start = 0x50000000,
            .size = 0x8000000,
            .flags =
                JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO,
        },
        /* PCIe Mem32 */
        {
            .phys_start = 0x58000000,
            .virt_start = 0x58000000,
            .size = 0x28000000,
            .flags =
                JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO,
        },
        /* PCIe Mem64 */
        {
            .phys_start = 0x1000000000,
            .virt_start = 0x1000000000,
            .size = 0x1000000000,
            .flags =
                JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE | JAILHOUSE_MEM_IO,
        },
        /*gicr*/
        {
            .phys_start = 0x29980000,
            .virt_start = 0x29980000,
            .size = 0x80000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
        },
        /*gicc*/
        {
            .phys_start = 0x29c00000,
            .virt_start = 0x29c00000,
            .size = 0x10000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
        },
        /*gich*/
        {
            .phys_start = 0x29c10000,
            .virt_start = 0x29c10000,
            .size = 0x20000,
            .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |
                     JAILHOUSE_MEM_IO | JAILHOUSE_MEM_ROOTSHARED,
        },
    },

    .pci_devices =
        {

        },
    .pci_caps =
        {

        },
};
